Invention Application
- Patent Title: CLOCK JITTER MEASUREMENT CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
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Application No.: US15432731Application Date: 2017-02-14
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Publication No.: US20180011142A1Publication Date: 2018-01-11
- Inventor: Kang-yeop CHOO , Hyun-ik KIM , Tae-ik KIM , Ji-hyun KIM , Woo-seok KIM
- Applicant: Samsung Electronics Co., Ltd.
- Priority: KR10-2016-0087117 20160708
- Main IPC: G01R31/317
- IPC: G01R31/317 ; H03L7/183 ; H03L7/091

Abstract:
A circuit for measuring clock jitter includes: an internal signal generator configured to generate an internal clock signal and a single pulse signal, respectively synchronized with an input clock signal; a plurality of delay units being connected in series with each other and configured to generate respective delayed clock signals; a plurality of latch circuits configured to latch the single pulse signal in synchronization with the respective delayed clock signals, and output sampling signals; and a count sub-circuit configured to output a count value resulting from counting a number of active sampling signals of the sampling signals.
Public/Granted literature
- US09989588B2 Clock jitter measurement circuit and semiconductor device including the same Public/Granted day:2018-06-05
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