专利检索 ap:("Samsung Electronics Co., Ltd.") AND inv:"Kang-yeop CHOO" 第 1 页

1.

发明申请
CLOCK JITTER MEASUREMENT CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME 有权

公开(公告)号：US20180011142A1

公开(公告)日：2018-01-11

申请号：US15432731

申请日：2017-02-14

申请人： Samsung Electronics Co., Ltd.

发明人： Kang-yeop CHOO , Hyun-ik KIM , Tae-ik KIM , Ji-hyun KIM , Woo-seok KIM

IPC分类号： G01R31/317 , H03L7/183 , H03L7/091

CPC分类号： G01R31/31709 , H03K5/1565 , H03L7/091 , H03L7/183

摘要： A circuit for measuring clock jitter includes: an internal signal generator configured to generate an internal clock signal and a single pulse signal, respectively synchronized with an input clock signal; a plurality of delay units being connected in series with each other and configured to generate respective delayed clock signals; a plurality of latch circuits configured to latch the single pulse signal in synchronization with the respective delayed clock signals, and output sampling signals; and a count sub-circuit configured to output a count value resulting from counting a number of active sampling signals of the sampling signals.