Invention Application
- Patent Title: ADAPTIVE READ THRESHOLD VOLTAGE TRACKING WITH BIT ERROR RATE ESTIMATION BASED ON NON-LINEAR SYNDROME WEIGHT MAPPING
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Application No.: US15639019Application Date: 2017-06-30
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Publication No.: US20180011753A1Publication Date: 2018-01-11
- Inventor: AbdelHakim S. Alhussien , Sundararajan Sankaranarayanan , Erich F. Haratsch
- Applicant: Seagate Technology LLC
- Applicant Address: US CA Cupertino
- Assignee: Seagate Technology LLC
- Current Assignee: Seagate Technology LLC
- Current Assignee Address: US CA Cupertino
- Main IPC: G06F11/07
- IPC: G06F11/07 ; G11C16/08 ; G11C11/56 ; G11C16/26

Abstract:
Adaptive read threshold voltage tracking techniques are provided that employ bit error rate estimation based on a non-linear syndrome weight mapping. An exemplary device comprises a controller configured to determine a bit error rate for at least one of a plurality of read threshold voltages in a memory using a non-linear mapping of a syndrome weight to the bit error rate for the at least one of the plurality of read threshold voltages.
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