Invention Application
- Patent Title: NONVOLATILE MEMORY SYSTEM AND ERROR DETERMINATION METHOD THEREOF
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Application No.: US15434314Application Date: 2017-02-16
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Publication No.: US20180011754A1Publication Date: 2018-01-11
- Inventor: Jung Hyun KWON , Sung Eun LEE , Jae Sun LEE , Jingzhe XU
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si Gyeonggi-do
- Priority: KR1020160084855 20160705; KR1020160158387 20161125
- Main IPC: G06F11/07
- IPC: G06F11/07 ; G06F3/06

Abstract:
A memory system may be provided. The memory system may include a memory apparatus including a plurality of memory cells. The memory system may include and a controller configured to control a write operation and a read operation with respect to the memory apparatus, detect an error occurrence position by performing the write operation and the read operation on a corresponding region of the memory apparatus in which an error occurs based on error occurrence address information generated in the read operation while changing a level of data to be written, and determine a type of error based on the detected error occurrence position.
Public/Granted literature
- US10296405B2 Nonvolatile memory system and error determination method thereof Public/Granted day:2019-05-21
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