Invention Application
- Patent Title: INSULATING WALL AND METHOD OF MANUFACTURING THE SAME
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Application No.: US15703246Application Date: 2017-09-13
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Publication No.: US20180012926A1Publication Date: 2018-01-11
- Inventor: Francois Roy
- Applicant: STMicroelectronics (Crolles 2) SAS
- Applicant Address: FR Crolles
- Assignee: STMicroelectronics (Crolles 2) SAS
- Current Assignee: STMicroelectronics (Crolles 2) SAS
- Current Assignee Address: FR Crolles
- Priority: FR1652441 20160322
- Main IPC: H01L27/146
- IPC: H01L27/146

Abstract:
A pixel includes a semiconductor layer with a charge accumulation layer extending in the semiconductor layer. A transistor has a read region penetrating into said semiconductor layer down to a first depth. An insulating wall penetrates into the semiconductor layer from an upper surface and containing an insulated conductor connected to a node of application of a potential. The insulating wall includes at least a portion provided with a deep insulating plug penetrating into the insulated conductor down to a second depth greater than the first depth. A continuous portion of the insulating wall laterally delimits, at least partially, a charge accumulation area and includes a wall portion with the deep insulating plug at least partially laterally delimiting the read region of the transistor.
Public/Granted literature
- US10361238B2 Insulating wall and method of manufacturing the same Public/Granted day:2019-07-23
Information query
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