A chip package structure includes a chip, an encapsulant, a dielectric layer and a patterned circuit layer. The chip includes an active surface and a plurality of pads disposed on the active surface. The encapsulant encapsulates the chip and exposes active surface, wherein the encapsulant includes a concave surface and a back surface opposite to the concave surface, the concave surface exposes the active surface and is dented toward the back surface. The dielectric layer covers the concave surface and the active surface and includes a plurality of openings exposing the pads, wherein the opening includes a slanted side surface and the angle between the slanted side surface and the active surface is an acute angle. The patterned circuit layer is disposed on the dielectric layer and electrically connected to the pads through the openings.