Invention Application
- Patent Title: MAKING ELECTRICAL COMPONENTS IN HANDLE WAFERS OF INTEGRATED CIRCUIT PACKAGES
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Application No.: US15804847Application Date: 2017-11-06
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Publication No.: US20180076278A1Publication Date: 2018-03-15
- Inventor: Liang WANG , Hong SHEN , Rajesh KATKAR
- Applicant: INVENSAS CORPORATION
- Applicant Address: US CA SAN JOSE
- Assignee: INVENSAS CORPORATION
- Current Assignee: INVENSAS CORPORATION
- Current Assignee Address: US CA SAN JOSE
- Main IPC: H01L49/02
- IPC: H01L49/02 ; H01L21/56 ; H01L25/00 ; H01L23/498 ; H01L23/00 ; H01L23/522 ; H01L25/16 ; H01L25/11 ; H01L25/10

Abstract:
A method for making an integrated circuit package includes providing a handle wafer having a first region defining a cavity. A capacitor is formed in the first region. The capacitor has a pair of electrodes, each coupled to one of a pair of conductive pads, at least one of which is disposed on a lower surface of the handle wafer. An interposer having an upper surface with a conductive pad and at least one semiconductor die disposed thereon is also provided. The die has an integrated circuit that is electroconductively coupled to a redistribution layer (RDL) of the interposer. The lower surface of the handle wafer is bonded to the upper surface of the interposer such that the die is disposed below or within the cavity and the electroconductive pad of the handle wafer is bonded to the electroconductive pad of the interposer in a metal-to-metal bond.
Public/Granted literature
- US10204977B2 Making electrical components in handle wafers of integrated circuit packages Public/Granted day:2019-02-12
Information query
IPC分类: