Invention Application
- Patent Title: SUBSTRATE NOISE ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES
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Application No.: US15272292Application Date: 2016-09-21
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Publication No.: US20180083096A1Publication Date: 2018-03-22
- Inventor: Jing Jing , Shuxian Wu , Jane Sowards
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/761

Abstract:
An example a semiconductor device includes a first circuit and a second circuit formed in a semiconductor substrate. The semiconductor device further includes a first guard structure formed in the semiconductor substrate and disposed between the first circuit and the second circuit, the first guard structure including first discontinuous pairs of n+ and p+ diffusions disposed along a first axis. The semiconductor device further includes a second guard structure formed in the semiconductor substrate and disposed between the first circuit and the second circuit, the second guard structure including second discontinuous pairs of n+ and p+ diffusions disposed along the first axis, the second discontinuous pairs of n+ and p+ diffusions being staggered with respect to the first discontinuous pairs of n+ and p+ diffusions.
Public/Granted literature
- US09923051B1 Substrate noise isolation structures for semiconductor devices Public/Granted day:2018-03-20
Information query
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