Invention Application
- Patent Title: SiN SPACER PROFILE PATTERNING
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Application No.: US15350803Application Date: 2016-11-14
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Publication No.: US20180138049A1Publication Date: 2018-05-17
- Inventor: Jungmin Ko , Tom Choi , Nitin Ingle , Kwang-Soo Kim , Theodore Wou
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L21/02

Abstract:
Processing methods may be performed to form recesses in a semiconductor substrate. The methods may include oxidizing an exposed silicon nitride surface on a semiconductor substrate within a processing region of a semiconductor processing chamber. The methods may include forming an inert plasma within the processing region of the processing chamber. Effluents of the inert plasma may be utilized to modify the oxidized silicon nitride. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified oxidized silicon nitride from the semiconductor substrate.
Public/Granted literature
- US10026621B2 SiN spacer profile patterning Public/Granted day:2018-07-17
Information query
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