Invention Application
- Patent Title: ADAPTIVE ERROR CORRECTION IN MEMORY DEVICES
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Application No.: US15737202Application Date: 2016-06-02
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Publication No.: US20180165152A1Publication Date: 2018-06-14
- Inventor: Helia Naeimi , Wei Wu , Shigeki Tomishima , Shih-Lien Lu
- Applicant: Intel Corporation
- International Application: PCT/US2016/035513 WO 20160602
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C29/52

Abstract:
Some embodiments include apparatuses and methods having an interface to receive information from memory cells, the memory cells configured to have a plurality of states to indicate values of information stored in the memory cells, and a control unit to monitor errors in information retrieved from the memory cells. Based on the errors in the information, the control unit generates control information to cause the memory cell to change to from a state among the plurality of states to an additional state. The additional state is different from the plurality of states.
Public/Granted literature
- US10552257B2 Adaptive error correction in memory devices Public/Granted day:2020-02-04
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