Invention Application

ULTRA LEAN VECTOR PROCESSOR
Abstract:
An apparatus comprises a central processor that outputs a first control signal to data organizers that organizes and moves data and a second control signal to vector processors that receives a first and second set of data from the data organizers. A first vector processor includes a first instruction circuit that executes a first plurality of vector functions and a second instruction circuit that executes a second plurality of vector functions. A first vector function is selected from the first plurality of vector functions to process the first set of data in response to the second control signal. Similarly, a second vector function is selected from the second plurality of vector functions to process the second set of data in response to the second control signal.
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