Invention Application
- Patent Title: LOW SCHOTTKY BARRIER CONTACT STRUCTURE FOR GE NMOS
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Application No.: US15773894Application Date: 2015-12-24
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Publication No.: US20180331195A1Publication Date: 2018-11-15
- Inventor: Willy RACHMADY , Matthew V. METZ , Benjamin CHU-KUNG , Van H. LE , Gilbert DEWEY , Ashish AGRAWAL , Jack T. KAVALIEROS
- Applicant: Intel Corporation
- International Application: PCT/US2015/000362 WO 20151224
- Main IPC: H01L29/47
- IPC: H01L29/47 ; H01L29/66 ; H01L21/28

Abstract:
An apparatus including a substrate; a transistor device on the substrate including a channel and a source and a drain disposed between the channel; a source contact coupled to the source and a drain contact coupled to the drain; and the source and drain each including a composition including a concentration of germanium at an interface with the channel that is greater than a concentration of germanium at a junction with the source contact. A method including defining an area on a substrate for a transistor device; forming a source and a drain each including an interface with the channel; and forming a contact to one of the source and the drain, wherein a composition of each of the source and the drain includes a concentration of germanium at an interface with the channel that is greater than a concentration at a junction with the contact.
Public/Granted literature
- US10665688B2 Low Schottky barrier contact structure for Ge NMOS Public/Granted day:2020-05-26
Information query
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