Invention Application
- Patent Title: RELEASE CHEMICAL PROTECTION FOR INTEGRATED COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) AND MICRO-ELECTRO-MECHANICAL (MEMS) DEVICES
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Application No.: US16101353Application Date: 2018-08-10
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Publication No.: US20180346323A1Publication Date: 2018-12-06
- Inventor: Michael J. Daneman , Fariborz Assaderaghi
- Applicant: INVENSENSE, INC.
- Main IPC: B81C1/00
- IPC: B81C1/00 ; B81B7/00

Abstract:
Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electro-mechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally, or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.
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