Invention Application
- Patent Title: TECHNOLOGIES FOR CACHE SIDE CHANNEL ATTACK DETECTION AND MITIGATION
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Application No.: US16022976Application Date: 2018-06-29
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Publication No.: US20190042739A1Publication Date: 2019-02-07
- Inventor: John J. Browne , Marcel Cornu , Timothy Verrall , Tomasz Kantecki , Niall Power , Weigang Li , Eoin Walsh , Maryam Tahhan
- Applicant: Intel Corporation
- Main IPC: G06F21/55
- IPC: G06F21/55 ; G06F21/56

Abstract:
Technologies for cache side channel attack detection and mitigation include an analytics server and one or more monitored computing devices. The analytics server polls each computing device for analytics counter data. The computing device generates the analytics counter data using a resource manager of a processor of the computing device. The analytics counter data may include last-level cache data or memory bandwidth data. The analytics server identifies suspicious core activity based on the analytics counter data and, if identified, deploys a detection process to the computing device. The computing device executes the detection process to identify suspicious application activity. If identified, the computing device may perform one or more corrective actions. Corrective actions include limiting resource usage by a suspicious process using the resource manager of the processor. The resource manager may limit cache occupancy or memory bandwidth used by the suspicious process. Other embodiments are described and claimed.
Public/Granted literature
- US10860714B2 Technologies for cache side channel attack detection and mitigation Public/Granted day:2020-12-08
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