- 专利标题: MEMORY DEVICE WITH WRITE DATA BUS CONTROL
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申请号: US16225303申请日: 2018-12-19
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公开(公告)号: US20190122708A1公开(公告)日: 2019-04-25
- 发明人: Chikara Kondo , Tomoyuki Shibata , Chiaki Dono , Seiji Narui , Minehiko Uehara , Taihei Shido , Homare Sato
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 主分类号: G11C7/10
- IPC分类号: G11C7/10 ; G11C7/22 ; G11C19/28
摘要:
Apparatuses and methods for transmitting data between a plurality of chips are described. An example apparatus includes: a first chip, wherein the first chip includes a receiver that receives a data strobe signal and further generates an internal strobe signal responsive, at least in part, to the data strobe signal, the internal strobe signal including a first edge and a second edge following the first edge; a buffer circuit coupled to a set of input terminals and captures first data at the set of input terminals responsive, at least in part, to the first edge of the internal strobe signal and further captures second data at the set of input terminals responsive, at least in part, to the second edge of the internal strobe signal; a driver coupled between the buffer circuit and a set of data terminals and configured to be activated to provide the first and second data from the buffer circuit to the set of data terminals responsive, at least in part, to a control signal; and a width expanding circuit that provides the control signal responsive, at least in part, to the internal strobe signal.
公开/授权文献
- US10553263B2 Memory device with write data bus control 公开/授权日:2020-02-04
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