Invention Application
- Patent Title: METHOD OF FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
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Application No.: US16180609Application Date: 2018-11-05
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Publication No.: US20190288001A1Publication Date: 2019-09-19
- Inventor: Han Geun Yu , Daehyun Jang
- Applicant: Samsung Electronics Co., Ltd.
- Priority: KR10-2018-0029847 20180314
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L21/033 ; H01L21/311 ; H01L27/11568 ; H01L27/11565

Abstract:
Methods of fabricating a three-dimensional semiconductor memory device are provided. A method may include forming a mold structure on a substrate including channel regions and a non-channel region between the channel regions, and forming, on the mold structure, a multilayered mask layer including a first mask layer, an etch stop layer, and a second mask layer that are sequentially stacked. The multilayered mask layer may include mask holes exposing the mold structure in the channel regions, dummy mask holes exposing the first mask layer in the non-channel region, and buffer spacers covering sidewalls of the second mask layer exposed by the mask holes and the dummy mask holes. The method may include etching the mold structure using the multilayered mask layer as an etch mask to form channel holes in the channel regions.
Public/Granted literature
- US10672790B2 Method of fabricating three-dimensional semiconductor memory device Public/Granted day:2020-06-02
Information query
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