- 专利标题: TIME-TO-DIGITAL CONVERTER CIRCUIT
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申请号: US15991020申请日: 2018-05-29
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公开(公告)号: US20190339650A1公开(公告)日: 2019-11-07
- 发明人: Henry YAO , Sinjeet Dhanvantray PAREKH
- 申请人: TEXAS INSTRUMENTS INCORPORATED
- 主分类号: G04F10/00
- IPC分类号: G04F10/00 ; H03L7/197
摘要:
A time-to-digital converter circuit includes a logic gate coupled to receive a first trigger signal indicative of a first clock signal and a second trigger signal indicative of a second clock signal. The logic gate is to generate a logic gate output signal responsive to the earlier of the first or second trigger signals to be a logic high. A synchronization circuit is included and is coupled to the logic gate and is configured to synchronize the logic gate output signal to a third clock to produce a synchronization output signal. A counter circuit counts pulses of the synchronization output signal.
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