- 专利标题： SIMULTANEOUS METAL PATTERNING FOR 3D INTERCONNECTS
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申请号： US16570436申请日： 2019-09-13
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公开(公告)号： US20200091002A1公开(公告)日： 2020-03-19
- 发明人: Suketu A. Parikh
- 申请人： Applied Materials, Inc.
- 申请人地址： US CA Santa Clara
- 专利权人： Applied Materials, Inc.
- 当前专利权人： Applied Materials, Inc.
- 当前专利权人地址： US CA Santa Clara
- 主分类号： H01L21/822
- IPC分类号： H01L21/822 ; H01L21/32 ; H01L21/762 ; H01L21/027
摘要：
Processing methods may be performed to produce three-dimensional interconnects on a substrate. The methods may include forming a first metal interconnect layer over a semiconductor substrate. The methods may include forming a first dielectric layer over the first metal interconnect layer. The methods may include forming a second metal interconnect layer over the first dielectric layer. The methods may include forming a patterning mask overlying the second metal interconnect layer. The methods may also include simultaneously etching each of the first metal interconnect layer, the first dielectric layer, and the second metal interconnect layer to expose the substrate to produce a multilayer interconnect structure in a first lateral direction.
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