Invention Application
- Patent Title: VERTICAL TRANSISTOR AND METHOD OF FORMING THE VERTICAL TRANSISTOR
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Application No.: US16776690Application Date: 2020-01-30
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Publication No.: US20200167331A1Publication Date: 2020-05-28
- Inventor: Fee Li LIE , Shogo MOCHIZUKI , Junli WANG
- Applicant: International Business Machines Corporation
- Main IPC: G06F16/23
- IPC: G06F16/23 ; G06F9/455 ; G06F11/14 ; G06F16/188 ; G06F16/16 ; G06F16/13
Abstract:
A semiconductor device includes a source/drain (S/D) region, a fin structure formed on the S/D region, and a gate structure formed on the fin structure so that a space is formed between the S/D region and the gate structure.
Public/Granted literature
- US11520768B2 Vertical transistor and method of forming the vertical transistor Public/Granted day:2022-12-06
Information query
