- 专利标题: SELF-ALIGNED LOCAL INTERCONNECTS
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申请号: US16274758申请日: 2019-02-13
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公开(公告)号: US20200258778A1公开(公告)日: 2020-08-13
- 发明人: Aaron D. Lilak , Ehren Mannebach , Anh Phan , Richard Schenker , Stephanie A. Bojarski , Willy Rachmady , Patrick Morrow , Jeffery Bielefeld , Gilbert Dewey , Hui Jae Yoo , Nafees Kabir
- 申请人: INTEL CORPORATION
- 申请人地址: US CA Santa Clara
- 专利权人: INTEL CORPORATION
- 当前专利权人: INTEL CORPORATION
- 当前专利权人地址: US CA Santa Clara
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L29/78 ; H01L29/66 ; H01L27/092 ; H01L23/522 ; H01L21/02 ; H01L21/8238
摘要:
In some embodiments, a semiconductor device structure is formed by using an angled etch to remove material so as to expose a portion of an adjacent conductor. The space formed upon removing the material can then be filled with a conductive material during formation of a contact or other conductive structure (e.g., and interconnection). In this way, the contact formation also fills the space to form an angled local interconnect portion that connects adjacent structures (e.g., a source/drain contact to an adjacent source/drain contact, a source/drain contact to an adjacent gate contact, a source/drain contact to an adjacent device level conductor also connected to a gate/source/drain contact). In other embodiments, an interconnection structure herein termed a “jogged via” establishes and electrical connection from laterally adjacent peripheral surfaces of conductive structures that are not coaxially or concentrically aligned with one another.
公开/授权文献
- US11424160B2 Self-aligned local interconnects 公开/授权日:2022-08-23
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