Invention Application
- Patent Title: SUBSTRATE PATCH RECONSTITUTION OPTIONS
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Application No.: US16299415Application Date: 2019-03-12
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Publication No.: US20200294920A1Publication Date: 2020-09-17
- Inventor: Haifa HARIRI , Amruthavalli P. ALUR , Wei-Lun K. JEN , Islam A. SALAMA
- Applicant: Intel Corporation
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/31

Abstract:
Embodiments include semiconductor packages. A semiconductor package includes a first patch and a second patch on an interposer. The semiconductor package also includes a first substrate in the first patch, and a second substrate in the second patch. The semiconductor package further includes an encapsulation layer over and around the first and second patches, a plurality of build-up layers on the first patch, the second patch, and the encapsulation layer, and a plurality of dies and a bridge on the build-up layers. The bridge may be communicatively coupled with the first substrate of the first patch and the second substrate of the second patch. The bridge may be an embedded multi-die interconnect bridge (EMIB). The first and second substrates may be EMIBs and/or high-density packaging (HDP) substrates. The bridge may be positioned between two dies, and over an edge of the first patch and an edge of the second patch.
Public/Granted literature
- US11552019B2 Substrate patch reconstitution options Public/Granted day:2023-01-10
Information query
IPC分类: