Invention Application
- Patent Title: DECK-TO-DECK RESET CURRENT OFFSET SUPPRESSION FOR THREE-DIMENSIONAL (3D) MEMORY
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Application No.: US16361030Application Date: 2019-03-21
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Publication No.: US20200303463A1Publication Date: 2020-09-24
- Inventor: Andrea REDAELLI
- Applicant: Intel Corporation
- Main IPC: H01L27/24
- IPC: H01L27/24 ; H01L45/00 ; G11C13/00

Abstract:
A three-dimensional (3D) memory device includes multiple decks of memory cells. Each deck includes layers of material, including a layer of storage material (e.g., a phase change material). Each deck also includes an interlayer between the phase change material and conductive access lines. The interlayer can include, for example, one or more of tungsten, carbon, silicon, silicon oxide, silicon nitride, aluminum oxide, hafnium oxide, and titanium silicon nitride. In one such example, the interlayer includes tungsten silicon nitride (WSiN). The interlayers of different decks have different properties, such as different thicknesses or resistivities, to reduce or eliminate the deck-to-deck reset current offset.
Public/Granted literature
- US10825863B2 Deck-to-deck reset current offset suppression for three-dimensional (3D) memory Public/Granted day:2020-11-03
Information query
IPC分类: