Invention Application
- Patent Title: DENOISING OF INTRINSIC SNEAK CURRECT BY CELL LOCATION IN PRAM
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Application No.: US16386667Application Date: 2019-04-17
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Publication No.: US20200335160A1Publication Date: 2020-10-22
- Inventor: AMIT BERMAN
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Main IPC: G11C13/00
- IPC: G11C13/00 ; G06F11/10 ; G11C29/52 ; G06N20/00

Abstract:
A method of denoising intrinsic sneak currents in a PRAM memory array of M wordlines and N bitlines includes receiving, by the PRAM memory array, an input read address; and selecting from a table of wordline distances from a sense-amplifier versus estimated optimal currents for those wordline distances an estimated optimal reference current for a distance closest to the received input read address. The reference current determines whether a read current is ‘0’ or ‘1’ and minimizes a bit error rate due to effects of sneak paths and parasitic elements that distorts the read current.
Public/Granted literature
- US11120871B2 Denoising of intrinsic sneak current by cell location in PRAM Public/Granted day:2021-09-14
Information query