- 专利标题: SYSTEM POWER MANAGEMENT FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE)-BASED DEVICES
-
申请号: US15931307申请日: 2020-05-13
-
公开(公告)号: US20200371578A1公开(公告)日: 2020-11-26
- 发明人: Dilip Venkateswaran Murali , Murali Krishna , Thiyagarajan Selvam , Sujeev Dias , Tony Truong
- 申请人: QUALCOMM Incorporated
- 主分类号: G06F1/3234
- IPC分类号: G06F1/3234 ; G06F13/42
摘要:
Systems and methods for power management for Peripheral Component Interconnect express (PCIE) devices allow PCIE termini to enter advanced low-power states while a PCIE link is idle. These advanced low-power states may include scaling a clock frequency up through a complete shutdown of power rails and clocks within the PCIE terminus. Additionally, use of a wakeup signal such as a clock request (CLKREQ or CLKREQ#) signal may allow the terminus to wake relatively quickly and resume operation so as to avoid degradation of the user experience or loss of data.
公开/授权文献
信息查询