SYSTEM POWER MANAGEMENT FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE)-BASED DEVICES
摘要:
Systems and methods for power management for Peripheral Component Interconnect express (PCIE) devices allow PCIE termini to enter advanced low-power states while a PCIE link is idle. These advanced low-power states may include scaling a clock frequency up through a complete shutdown of power rails and clocks within the PCIE terminus. Additionally, use of a wakeup signal such as a clock request (CLKREQ or CLKREQ#) signal may allow the terminus to wake relatively quickly and resume operation so as to avoid degradation of the user experience or loss of data.
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