Invention Application
- Patent Title: POWER MANAGEMENT FOR MULTI-DIMENSIONAL PROGRAMMABLE LOGIC DEVICES
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Application No.: US17074245Application Date: 2020-10-19
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Publication No.: US20210036705A1Publication Date: 2021-02-04
- Inventor: Karthik Chandrasekar , Guang Chen , Wendemagegnehu T. Beyene , Ravi Prakash Gutala
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H03K19/17772
- IPC: H03K19/17772 ; H01L25/18 ; H01L23/538 ; H01L23/00 ; G06F30/34

Abstract:
A device may include a fabric die coupled to an active interposer. The fabric die may include programmable logic fabric and configuration memory that programs the programmable logic fabric. The programmable logic fabric of the fabric die may access at least a portion of the active interposer to perform an operation. As discussed herein, different power management techniques associated with the active interposer may be used to improve operation of the device.
Public/Granted literature
- US11444624B2 Power management for multi-dimensional programmable logic devices Public/Granted day:2022-09-13
Information query
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