公开(公告)号：US10812085B2

公开(公告)日：2020-10-20

申请号：US16234231

申请日：2018-12-27

Applicant: Intel Corporation

Inventor： Karthik Chandrasekar ,  Guang Chen ,  Wendemagegnehu T. Beyene ,  Ravi Prakash Gutala

IPC: H03K19/17772 ,  H01L25/18 ,  H01L23/538 ,  H01L23/00 ,  G06F30/34 ,  H02M3/04 ,  H02M3/156

Abstract: A device may include a fabric die coupled to an active interposer. The fabric die may include programmable logic fabric and configuration memory that programs the programmable logic fabric. The programmable logic fabric of the fabric die may access at least a portion of the active interposer to perform an operation. As discussed herein, different power management techniques associated with the active interposer may be used to improve operation of the device.

公开(公告)号：US11444624B2

公开(公告)日：2022-09-13

申请号：US17074245

申请日：2020-10-19

Applicant: Intel Corporation

Inventor： Karthik Chandrasekar ,  Guang Chen ,  Wendemagegnehu T. Beyene ,  Ravi Prakash Gutala

IPC: H03K19/17772 ,  H01L25/18 ,  H01L23/538 ,  H01L23/00 ,  G06F30/34 ,  H02M3/04 ,  H02M3/156

Abstract: A device may include a fabric die coupled to an active interposer. The fabric die may include programmable logic fabric and configuration memory that programs the programmable logic fabric. The programmable logic fabric of the fabric die may access at least a portion of the active interposer to perform an operation. As discussed herein, different power management techniques associated with the active interposer may be used to improve operation of the device.

公开(公告)号：US20200105732A1

公开(公告)日：2020-04-02

申请号：US16146716

申请日：2018-09-28

Applicant: Intel Corporation

Inventor： Karthik Chandrasekar ,  Shreepad Panth ,  Ravi Prakash Gutala

IPC: H01L25/18 ,  H01L23/00 ,  H03L7/081 ,  H03K19/177 ,  H01L23/538

Abstract: An integrated circuit device that may include programmable logic fabric disposed on an integrated circuit die and a base die that may include clocking circuitry. Synchronization between logic resources in the programmable logic fabric may be performed using clock signals received from the clocking circuitry. The clocking circuitry in the base die may include phase-locked loops, delay-locked loops, clock trees, and other similar circuitry.

公开(公告)号：US20210036705A1

公开(公告)日：2021-02-04

申请号：US17074245

申请日：2020-10-19

Applicant: Intel Corporation

Inventor： Karthik Chandrasekar ,  Guang Chen ,  Wendemagegnehu T. Beyene ,  Ravi Prakash Gutala

IPC: H03K19/17772 ,  H01L25/18 ,  H01L23/538 ,  H01L23/00 ,  G06F30/34

Abstract: A device may include a fabric die coupled to an active interposer. The fabric die may include programmable logic fabric and configuration memory that programs the programmable logic fabric. The programmable logic fabric of the fabric die may access at least a portion of the active interposer to perform an operation. As discussed herein, different power management techniques associated with the active interposer may be used to improve operation of the device.

公开(公告)号：US10770443B2

公开(公告)日：2020-09-08

申请号：US16146716

申请日：2018-09-28

Applicant: Intel Corporation

Inventor： Karthik Chandrasekar ,  Shreepad Panth ,  Ravi Prakash Gutala

IPC: H01L25/18 ,  H01L23/00 ,  H03L7/081 ,  H03K19/17796 ,  H01L23/538

Abstract: An integrated circuit device that may include programmable logic fabric disposed on an integrated circuit die and a base die that may include clocking circuitry. Synchronization between logic resources in the programmable logic fabric may be performed using clock signals received from the clocking circuitry. The clocking circuitry in the base die may include phase-locked loops, delay-locked loops, clock trees, and other similar circuitry.

公开(公告)号：US20190131976A1

公开(公告)日：2019-05-02

申请号：US16234231

申请日：2018-12-27

Applicant: Intel Corporation

Inventor： Karthik Chandrasekar ,  Guang Chen ,  Wendemagegnehu T. Beyene ,  Ravi Prakash Gutala

IPC: H03K19/177 ,  H01L25/18 ,  H01L23/538 ,  H01L23/00 ,  G06F17/50

Abstract: A device may include a fabric die coupled to an active interposer. The fabric die may include programmable logic fabric and configuration memory that programs the programmable logic fabric. The programmable logic fabric of the fabric die may access at least a portion of the active interposer to perform an operation. As discussed herein, different power management techniques associated with the active interposer may be used to improve operation of the device.