Invention Application
- Patent Title: INTERCONNECTED COMMAND/ADDRESS RESOURCES
-
Application No.: US16836646Application Date: 2020-03-31
-
Publication No.: US20210304838A1Publication Date: 2021-09-30
- Inventor: Jason M. Johnson , Yoshinori Fujiwara , Kevin G. Werhane
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G11C29/48
- IPC: G11C29/48 ; H01L25/065 ; G11C8/06 ; H01L23/538 ; G11C5/06

Abstract:
Command/address (CA) pads of a wafer may be coupled with one or more logic circuits of the wafer to support transmission of a test signal between different memory dies of the wafer. A CA pad of a first memory die may be coupled with a repeater circuit in a scribe region of the wafer, and the repeater circuit may be coupled with a corresponding control circuit in the scribe region. These circuits may support repetition of a signal from a probe card to one or more other CA conductive paths of one or more other memory dies of the wafer. The repeater circuit may receive a test signal from the CA pad, which may be coupled with and receive the test signal from the probe card, and may transmit the test signal to another CA pad of another memory die based on a configuration of the control circuit.
Public/Granted literature
- US11342042B2 Interconnected command/address resources Public/Granted day:2022-05-24
Information query