- 专利标题: MULTILAYER WIRING SUBSTRATE
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申请号: US17368905申请日: 2021-07-07
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公开(公告)号: US20210337663A1公开(公告)日: 2021-10-28
- 发明人: Atsushi KISHIMOTO , Masatoshi KAKUE , Shuichi KAWATA , Hiroshi NISHIKAWA
- 申请人: Murata Manufacturing Co., Ltd.
- 申请人地址: JP Nagaokakyo-shi
- 专利权人: Murata Manufacturing Co., Ltd.
- 当前专利权人: Murata Manufacturing Co., Ltd.
- 当前专利权人地址: JP Nagaokakyo-shi
- 优先权: JP2019-015481 20190131
- 主分类号: H05K1/02
- IPC分类号: H05K1/02 ; B32B3/26 ; B32B9/00
摘要:
A multilayer wiring substrate according to the present invention includes a dielectric base body, a signal line in or on the dielectric base body, a ground conductor in the dielectric base body, and a graphite sheet in the dielectric base body. The dielectric base body is a laminate including dielectric sheets stacked on top of each other. The ground conductor and the signal line face each other in a stacking direction of the dielectric sheets. The ground conductor overlaps the signal line when viewed in plan in the stacking direction. The graphite sheet and the signal line face each other in the stacking direction without the signal line being located between the graphite sheet and the ground conductor. An upper surface of the graphite sheet is coplanar with an upper surface of the ground conductor or is located below the upper surface of the ground conductor.
公开/授权文献
- US11864313B2 Multilayer wiring substrate 公开/授权日:2024-01-02
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