Invention Application
- Patent Title: SELF-ALIGNED INTERCONNECT STRUCTURE
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Application No.: US16898670Application Date: 2020-06-11
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Publication No.: US20210391296A1Publication Date: 2021-12-16
- Inventor: Hsin-Chieh Yao , Chung-Ju Lee , Chih Wei Lu , Hsi-Wen Tien , Yu-Teng Dai , Wei-Hao Liao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/768

Abstract:
The present disclosure relates to a semiconductor structure including an interconnect structure disposed over a semiconductor substrate. A lower metal line is disposed at a first height over the semiconductor substrate and extends through a first interlayer dielectric layer. A second interlayer dielectric layer is disposed at a second height over the semiconductor substrate and comprises a first dielectric material. An upper metal line is disposed at a third height over the semiconductor substrate. A via is disposed at the second height. The via extends between the lower metal line and the upper metal line. A protective dielectric structure is disposed at the second height. The protective dielectric structure comprises a protective dielectric material and is disposed along a first set of opposing sidewalls of the via, the protective dielectric material differing from the first dielectric material.
Public/Granted literature
- US11488926B2 Self-aligned interconnect structure Public/Granted day:2022-11-01
Information query
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