Invention Application
- Patent Title: ELECTRONIC SIGNAL VERIFICATION USING A TRANSLATED SIMULATED WAVEFORM
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Application No.: US17370930Application Date: 2021-07-08
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Publication No.: US20220012394A1Publication Date: 2022-01-13
- Inventor: David Everett Burgess
- Applicant: Tektronix, Inc.
- Applicant Address: US OR Beaverton
- Assignee: Tektronix, Inc.
- Current Assignee: Tektronix, Inc.
- Current Assignee Address: US OR Beaverton
- Main IPC: G06F30/3308
- IPC: G06F30/3308 ; G06F30/323 ; G06F30/333 ; G01R31/3183

Abstract:
A system for verifying signals in electronic circuits that includes a waveform translator and a test-and-measurement instrument. The waveform translator is configured to receive a simulated waveform for a node of a simulated prototype circuit and to translate the simulated waveform into a translated waveform. The test-and-measurement instrument is configured to obtain a measured waveform and to determine a deviation of the measured waveform from the simulated waveform using the translated waveform.
Information query