ELECTRONIC SIGNAL VERIFICATION USING A TRANSLATED SIMULATED WAVEFORM
Abstract:
A system for verifying signals in electronic circuits that includes a waveform translator and a test-and-measurement instrument. The waveform translator is configured to receive a simulated waveform for a node of a simulated prototype circuit and to translate the simulated waveform into a translated waveform. The test-and-measurement instrument is configured to obtain a measured waveform and to determine a deviation of the measured waveform from the simulated waveform using the translated waveform.
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