INDIRECT ACQUISITION OF A SIGNAL FROM A DEVICE UNDER TEST

    公开(公告)号:US20210148975A1

    公开(公告)日:2021-05-20

    申请号:US17098155

    申请日:2020-11-13

    申请人: Tektronix, Inc.

    摘要: A system for acquiring a test-and-measurement signal from a device under test (DUT) including a test-and-measurement probe, a user interface, a robot, and a controller. The probe is configured to acquire an electronic signal from the DUT. The user interface displays a digital representation of a physical electronic circuit of the DUT, including portrayals of virtual nodes that correspond to actual nodes on the DUT. The robot is configured to automatically position the probe with respect to the DUT. The controller is configured to receive from the user interface an electronic indication of a selected node of the digital representation of the physical electronic circuit, where the selected node is one of the virtual nodes. The controller is further configured to provide instructions to the robot to automatically position the probe to a position on the physical electronic circuit corresponding to the actual node.

    Automated assisted circuit validation

    公开(公告)号:US11520966B2

    公开(公告)日:2022-12-06

    申请号:US17370976

    申请日:2021-07-08

    申请人: Tektronix, Inc.

    摘要: A method comprising categorizing nodes of a fabricated circuit as being priority nodes and nodes as being inferior nodes; evaluating a first priority node by automatically designating for verification the first priority node, and ascertaining whether a measured signal from the first priority node meets a pass-fail criterion for the first priority node; evaluating, when the measured signal from the first priority node meets the pass-fail criterion, a second priority node by automatically designating for verification the second priority node, and ascertaining whether a measured signal from the second priority node meets a pass-fail criterion for the second priority node; and evaluating, when the measured signal from the first priority node does not meet the pass-fail criterion, a first inferior node, by automatically designating for verification the first inferior node, and ascertaining whether a measured signal from the first inferior node meets a pass-fail criterion for the first inferior node.

    AUTOMATED ASSISTED CIRCUIT VALIDATION

    公开(公告)号:US20220012397A1

    公开(公告)日:2022-01-13

    申请号:US17370976

    申请日:2021-07-08

    申请人: Tektronix, Inc.

    摘要: A method comprising categorizing nodes of a fabricated circuit as being priority nodes and nodes as being inferior nodes; evaluating a first priority node by automatically designating for verification the first priority node, and ascertaining whether a measured signal from the first priority node meets a pass-fail criterion for the first priority node; evaluating, when the measured signal from the first priority node meets the pass-fail criterion, a second priority node by automatically designating for verification the second priority node, and ascertaining whether a measured signal from the second priority node meets a pass-fail criterion for the second priority node; and evaluating, when the measured signal from the first priority node does not meet the pass-fail criterion, a first inferior node, by automatically designating for verification the first inferior node, and ascertaining whether a measured signal from the first inferior node meets a pass-fail criterion for the first inferior node.

    ELECTRONIC SIGNAL VERIFICATION USING A TRANSLATED SIMULATED WAVEFORM

    公开(公告)号:US20220012394A1

    公开(公告)日:2022-01-13

    申请号:US17370930

    申请日:2021-07-08

    申请人: Tektronix, Inc.

    摘要: A system for verifying signals in electronic circuits that includes a waveform translator and a test-and-measurement instrument. The waveform translator is configured to receive a simulated waveform for a node of a simulated prototype circuit and to translate the simulated waveform into a translated waveform. The test-and-measurement instrument is configured to obtain a measured waveform and to determine a deviation of the measured waveform from the simulated waveform using the translated waveform.

    Indicating a probing target for a fabricated electronic circuit

    公开(公告)号:US11714121B2

    公开(公告)日:2023-08-01

    申请号:US17370958

    申请日:2021-07-08

    申请人: Tektronix, Inc.

    IPC分类号: G01R31/28 H01L21/66 G01N21/95

    摘要: A method for indicating a probing target for a fabricated electronic circuit including: generating an electronic, three-dimensional model based on manufacturing layout information of a fabricated circuit; obtaining, with a vision system, visual environment information for the fabricated circuit; scaling and orienting the three-dimensional model by a scaler and mapper based on the visual environment information; overlaying the three-dimensional model with the visual environment information to produce a correlated image; obtaining an identification of a desired network node of the fabricated circuit; and indicating a probing target, the probing target corresponding to the desired network node of the fabricated circuit.

    INDICATING A PROBING TARGET FOR A FABRICATED ELECTRONIC CIRCUIT

    公开(公告)号:US20220026483A1

    公开(公告)日:2022-01-27

    申请号:US17370958

    申请日:2021-07-08

    申请人: Tektronix, Inc.

    IPC分类号: G01R31/28 G01N21/95 H01L21/66

    摘要: A method for indicating a probing target for a fabricated electronic circuit including: generating an electronic, three-dimensional model based on manufacturing layout information of a fabricated circuit; obtaining, with a vision system, visual environment information for the fabricated circuit; scaling and orienting the three-dimensional model by a scaler and mapper based on the visual environment information; overlaying the three-dimensional model with the visual environment information to produce a correlated image; obtaining an identification of a desired network node of the fabricated circuit; and indicating a probing target, the probing target corresponding to the desired network node of the fabricated circuit.