Invention Application
- Patent Title: 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH REDUNDANCY
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Application No.: US17542492Application Date: 2021-12-05
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Publication No.: US20220093440A1Publication Date: 2022-03-24
- Inventor: Zvi Or-Bach , Brian Cronquist , Deepak C. Sekar
- Applicant: Monolithic 3D Inc.
- Applicant Address: US OR Klamath Falls
- Assignee: Monolithic 3D Inc.
- Current Assignee: Monolithic 3D Inc.
- Current Assignee Address: US OR Klamath Falls
- Main IPC: H01L21/683
- IPC: H01L21/683 ; H01L21/74 ; H01L21/762 ; H01L21/768 ; H01L21/822 ; H01L21/8238 ; H01L21/84 ; H01L23/48 ; H01L23/525 ; H01L27/02 ; H01L27/06 ; H01L27/092 ; H01L27/10 ; H01L27/105 ; H01L27/108 ; H01L27/11 ; H01L27/112 ; H01L27/11526 ; H01L27/11529 ; H01L27/11551 ; H01L27/11573 ; H01L27/11578 ; H01L27/118 ; H01L27/12 ; H01L29/423 ; H01L29/66 ; H01L29/78 ; H01L29/788 ; H01L29/792 ; G11C8/16

Abstract:
A semiconductor device, the device including: a first single crystal substrate and plurality of logic circuits, where the first single crystal substrate has a device area, where the device area is significantly larger than a reticle size, where the plurality of logic circuits include an array of processors, where the plurality of logic circuits include a first logic circuit, a second logic circuit, and third logic circuit, where the plurality of logic circuits include switching circuits to support replacing the first logic circuit and the second logic circuit by the third logic circuit; and a built-in-test-circuit (“BIST”), where the built-in-test-circuit is connected to test at least the first logic circuit and the second logic circuit.
Public/Granted literature
- US11482440B2 3D semiconductor device and structure with a built-in test circuit for repairing faulty circuits Public/Granted day:2022-10-25
Information query
IPC分类: