Invention Application
- Patent Title: LOW-POWER SOURCE-SYNCHRONOUS SIGNALING
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Application No.: US17521379Application Date: 2021-11-08
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Publication No.: US20220130445A1Publication Date: 2022-04-28
- Inventor: Jared L. ZERBE , Frederick A. WARE
- Applicant: Rambus Inc.
- Applicant Address: US CA San Jose
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: G11C11/4076
- IPC: G11C11/4076 ; G06F1/04 ; G06F13/42 ; G11C7/10 ; G11C7/22

Abstract:
A method of operating a memory controller is disclosed. The method includes transmitting data signals to a memory device over each one of at least two parallel data links. A timing signal is sent to the memory device on a first dedicated link. The timing signal has a fixed phase relationship with the data signals. A data strobe signal is driven to the memory device on a second dedicated link. Phase information is received from the memory device. The phase information being generated internal to the memory device and based on a comparison between the timing signal and a version of the data strobe signal internally distributed within the memory device. A phase of the data strobe signal is adjusted relative to the timing signal based on the received phase information.
Public/Granted literature
- US11749336B2 Low-power source-synchronous signaling Public/Granted day:2023-09-05
Information query
IPC分类: