Invention Application
- Patent Title: MULTI-TIER THREE-DIMENSIONAL MEMORY DEVICE WITH NESTED CONTACT VIA STRUCTURES AND METHODS FOR FORMING THE SAME
-
Application No.: US17081458Application Date: 2020-10-27
-
Publication No.: US20220130852A1Publication Date: 2022-04-28
- Inventor: Yuji TOTOKI , Fumitaka AMANO
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX ADDISON
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX ADDISON
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L23/522

Abstract:
A semiconductor structure includes a first alternating stack of first insulating layers and first electrically conductive layers having first stepped surfaces and located over a substrate, a second alternating stack of second insulating layers and second electrically conductive layers having second stepped surfaces, and memory opening fill structures extending through the alternating stacks. A contact via assembly is provided, which includes a first conductive via structure vertically extending from a top surface of one of the first electrically conductive layers through a subset of layers within the second alternating stack and through the second retro-stepped dielectric material portion, an insulating spacer located within an opening through the subset of layers, and a second conductive via structure laterally surrounding the insulating spacer and contacting a second electrically conductive layer.
Public/Granted literature
Information query
IPC分类: