Invention Application
- Patent Title: METHOD FOR FORMING FINFET DEVICES WITH A FIN TOP HARDMASK
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Application No.: US17576854Application Date: 2022-01-14
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Publication No.: US20220140103A1Publication Date: 2022-05-05
- Inventor: Kuo-Cheng CHING , Kai-Chieh YANG , Ching-Wei TSAI , Kuan-Lun CHENG , Chih-Hao WANG
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L29/49
- IPC: H01L29/49 ; H01L29/78 ; H01L21/28 ; H01L29/66

Abstract:
Aspects of the disclosure provide a method for forming a fin field effect transistor (FinFET) incorporating a fin top hardmask on top of a channel region of a fin. Because of the presence of the fin top hardmask, a gate height of the FinFET can be reduced without affecting proper operations of vertical gate channels on sidewalls of the fin. Consequently, parasitic capacitance between a gate stack and source/drain contacts of the FinFET can be reduced by lowering the gate height of the FinFET.
Public/Granted literature
- US12211921B2 Method for forming FinFET devices with a fin top hardmask Public/Granted day:2025-01-28
Information query
IPC分类: