Invention Application
- Patent Title: THIN FILM TRANSISTORS HAVING ELECTROSTATIC DOUBLE GATES
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Application No.: US17093452Application Date: 2020-11-09
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Publication No.: US20220149192A1Publication Date: 2022-05-12
- Inventor: Kirby MAXEY , Ashish Verma PENUMATCHA , Carl NAYLOR , Chelsey DOROW , Kevin P. O'BRIEN , Shriram SHIVARAMAN , Tanay GOSAVI , Uygar E. AVCI , Sudarat LEE
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/24 ; H01L29/786 ; H01L29/66

Abstract:
Thin film transistors having electrostatic double gates are described. In an example, an integrated circuit structure includes an insulator layer above a substrate. A first gate stack is on the insulator layer. A 2D channel material layer is on the first gate stack. A second gate stack is on a first portion of the 2D channel material layer, the second gate stack having a first side opposite a second side. A first conductive contact is adjacent the first side of the second gate stack, the first conductive contact on a second portion of the 2D channel material layer. A second conductive contact is adjacent the second side of the second gate stack, the second conductive contact on a third portion of the 2D channel material layer. A gate electrode of the first gate stack extends beneath a portion of the first conductive contact and beneath a portion of the second conductive contact.
Information query
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