Invention Application
- Patent Title: Raised Via for Terminal Connections on Different Planes
-
Application No.: US17650926Application Date: 2022-02-14
-
Publication No.: US20220165611A1Publication Date: 2022-05-26
- Inventor: Chen-Hua Yu , An-Jhih Su , Chi-Hsi Wu , Der-Chyang Yeh , Ming Shih Yeh , Jing-Cheng Lin , Hung-Jui Kuo
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/48 ; H01L23/48 ; H01L23/498 ; H01L23/522 ; H01L23/538 ; H01L23/00
Abstract:
A method includes forming a metal layer extending into openings of a dielectric layer to contact a first metal pad and a second metal pad, and bonding a bottom terminal of a component device to the metal layer. The metal layer has a first portion directly underlying and bonded to the component device. A raised via is formed on the metal layer, and the metal layer has a second portion directly underlying the raised via. The metal layer is etched to separate the first portion and the second portion of the metal layer from each other. The method further includes coating the raised via and the component device in a dielectric layer, revealing the raised via and a top terminal of the component device, and forming a redistribution line connecting the raised via to the top terminal.
Public/Granted literature
- US11646220B2 Raised via for terminal connections on different planes Public/Granted day:2023-05-09
Information query
IPC分类:
