Invention Application
- Patent Title: QUALITY FACTOR OF A PARASITIC CAPACITANCE
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Application No.: US17223792Application Date: 2021-04-06
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Publication No.: US20220209750A1Publication Date: 2022-06-30
- Inventor: Swaminathan Sankaran , Brad Kramer , Thomas Dyer Bonifield
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Main IPC: H03H11/02
- IPC: H03H11/02 ; H01L27/01 ; H01L27/06

Abstract:
An integrated circuit includes a substrate, a reference contact coupled to the substrate, a capacitor over the substrate, and a substrate element. The capacitor includes a first conductive element having an associated parasitic capacitance and a second conductive element electrically isolated from the first conductive element. The substrate element is coupled to the first conductive element by the parasitic capacitance and coupled to the reference contact. The substrate element includes a conductive doped region in the substrate and aligned with the first conductive element and the reference contact.
Information query