A microelectronic device includes a pair of stack structures. The pair comprises a lower stack structure and an upper stack structure overlying the lower stack structure. The lower stack structure and the upper stack structure each comprise a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A source region is vertically interposed between the lower stack structure and the upper stack structure. A first array of pillars extends through the upper stack structure, from proximate the source region toward a first drain region above the upper stack structure. A second array of pillars extend through the lower stack structure, from proximate the source region toward a second drain region below the lower stack structure. Additional microelectronic devices are also disclosed, as are related methods and electronic systems.