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公开(公告)号:US20210272845A1
公开(公告)日:2021-09-02
申请号:US17320863
申请日:2021-05-14
Applicant: Micron Technology, Inc.
IPC: H01L21/768 , H01L27/11582 , H01L27/11556
Abstract: A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and additional insulating structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the additional insulating structures. A first trench is formed to partially vertically extend through the stack structure. The first trench comprises a first portion having a first width, and a second portion at a horizontal boundary of the first portion and having a second width greater than the first width. A dielectric structure is formed within the first trench. The dielectric structure comprises a substantially void-free section proximate the horizontal boundary of the first portion of the trench. Microelectronic devices and electronic systems are also described.
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公开(公告)号:US20210126007A1
公开(公告)日:2021-04-29
申请号:US16664280
申请日:2019-10-25
Applicant: Micron Technology, Inc.
Inventor: Darwin A. Clampitt , Roger W. Lindsay , Christopher R. Ritchie , Shawn D. Lyonsmith , Matthew J. King , Lisa M. Clampitt
IPC: H01L27/11582 , H01L23/528 , H01L23/522 , H01L27/11556 , H01L21/768 , H01L21/311 , H01L21/02 , H01L27/11519 , H01L27/11565
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatus includes a first conductive contact; a second conductive contact; levels of conductive materials stacked over one another and located over the first and second conductive contacts; levels of dielectric materials interleaved with the levels of the conductive materials, the levels of conductive materials and the levels of dielectric materials formed a stack of materials; a first conductive structure located on a first side of the stack of materials and contacting the first conductive contact and a first level of conductive material of the levels of conductive materials; and a second conductive structure located on a second side of the stack of materials and contacting the second conductive contact and a second level of conductive material of the levels of conductive materials.
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公开(公告)号:US20200161187A1
公开(公告)日:2020-05-21
申请号:US16749443
申请日:2020-01-22
Applicant: Micron Technology, Inc.
Inventor: Anilkumar Chandolu , Matthew J. King , Indra V. Chary , Darwin A. Clampitt
IPC: H01L21/8234 , H01L27/11556
Abstract: A method of forming a semiconductor device comprises forming sacrificial structures and support pillars. The sacrificial structures comprise an isolated sacrificial structure in a slit region and connected sacrificial structures in a pillar region. Tiers are formed over the sacrificial structures and support pillars, and a portion of the tiers are removed to form tier pillars and tier openings, exposing the connected sacrificial structures and support pillars. The connected sacrificial structures are removed to form a cavity, a portion of the cavity extending below the isolated sacrificial structure. A cell film is formed over the tier pillars and over sidewalls of the cavity. A fill material is formed in the tier openings and over the cell film. A portion of the tiers in the slit region is removed, exposing the isolated sacrificial structure, which is removed to form a source opening. The source opening is connected to the cavity and a conductive material is formed in the source opening and in the cavity. Semiconductor devices and systems are also disclosed.
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公开(公告)号:US20250081461A1
公开(公告)日:2025-03-06
申请号:US18775247
申请日:2024-07-17
Applicant: Micron Technology, Inc.
Inventor: Darwin A. Clampitt
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes a conductive contact, a conductive portion formed over the conductive contact, and data lines located over the first conductive portion and separated from the first conductive portion by a dielectric material, the data lines formed from respective levels of conductive materials, and a conductive structure located on a side of the levels of conductive materials. The levels of conductive materials are stacked one over another in a first direction in different levels of the apparatus. The conductive structure includes a first portion and a second portion. The first portion extends in the first direction and coupled to a level of conductive material among the levels of conductive materials. The second portion extends in a second direction and coupled to the conductive portion.
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5.
公开(公告)号:US20240138145A1
公开(公告)日:2024-04-25
申请号:US18397059
申请日:2023-12-27
Applicant: Micron Technology, Inc.
Inventor: John D. Hopkins , Darwin A. Clampitt , Michael J. Puett , Christopher R. Ritchie
Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. A channel-material string is in individual channel openings in the vertically-alternating first tiers and second tiers. A conductor-material contact is in the individual channel openings directly against the channel material of individual of the channel-material strings. The conductor-material contacts are vertically recessed in the individual channel openings. A conductive via is formed in the individual channel openings directly against the vertically-recessed conductor-material contact in that individual channel opening. Other aspects, including structure independent of method, are disclosed.
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公开(公告)号:US11910601B2
公开(公告)日:2024-02-20
申请号:US17141968
申请日:2021-01-05
Applicant: Micron Technology, Inc.
Inventor: Darwin A. Clampitt , John D. Hopkins , Matthew J. King , Roger W. Lindsay , Kevin Y. Titus
IPC: H10B43/27 , H01L23/522 , H10B41/27
CPC classification number: H10B43/27 , H01L23/5226 , H10B41/27
Abstract: A microelectronic device includes a pair of stack structures. The pair comprises a lower stack structure and an upper stack structure overlying the lower stack structure. The lower stack structure and the upper stack structure each comprise a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A source region is vertically interposed between the lower stack structure and the upper stack structure. A first array of pillars extends through the upper stack structure, from proximate the source region toward a first drain region above the upper stack structure. A second array of pillars extend through the lower stack structure, from proximate the source region toward a second drain region below the lower stack structure. Additional microelectronic devices are also disclosed, as are related methods and electronic systems.
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公开(公告)号:US11756826B2
公开(公告)日:2023-09-12
申请号:US17473679
申请日:2021-09-13
Applicant: Micron Technology, Inc.
Inventor: Matthew J. King , Anilkumar Chandolu , Indra V. Chary , Darwin A. Clampitt , Gordon Haller , Thomas George , Brett D. Lowe , David A. Daycock
IPC: H01L21/768 , H01L21/762 , H10B43/40 , H10B43/20 , H10B43/35 , H10B43/50
CPC classification number: H01L21/76802 , H01L21/762 , H01L21/76808 , H01L21/76816 , H01L21/76877 , H10B43/20 , H10B43/35 , H10B43/40 , H10B43/50
Abstract: A termination opening can be formed through the stack alternating dielectrics concurrently with forming contact openings through the stack. A termination structure can be formed in the termination opening. An additional opening can be formed through the termination structure and through the stack between groups of semiconductor structures that pass through the stack. In another example, an opening can be formed through the stack so that a first segment of the opening is between groups of semiconductor structures in a first region of the stack and a second segment of the opening is in a second region of the stack that does not include the groups of semiconductor structures. A material can be formed in the second segment so that the first segment terminates at the material. In some instances, the material can be implanted in the dielectrics in the second region through the second segment.
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8.
公开(公告)号:US20230043786A1
公开(公告)日:2023-02-09
申请号:US17966594
申请日:2022-10-14
Applicant: Micron Technology, Inc.
Inventor: Darwin A. Clampitt , Roger W. Lindsay , Christopher R. Ritchie , Shawn D. Lyonsmith , Matthew J. King , Lisa M. Clampitt
IPC: H01L27/11582 , H01L23/528 , H01L23/522 , H01L27/11556 , H01L21/768 , H01L27/11565 , H01L21/311 , H01L21/02 , H01L27/11519 , H01L27/11524 , H01L27/1157 , H01L27/11575 , H01L27/11548 , G11C7/18
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatus includes a first conductive contact; a second conductive contact; levels of conductive materials stacked over one another and located over the first and second conductive contacts; levels of dielectric materials interleaved with the levels of the conductive materials, the levels of conductive materials and the levels of dielectric materials formed a stack of materials; a first conductive structure located on a first side of the stack of materials and contacting the first conductive contact and a first level of conductive material of the levels of conductive materials; and a second conductive structure located on a second side of the stack of materials and contacting the second conductive contact and a second level of conductive material of the levels of conductive materials.
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公开(公告)号:US20210408029A1
公开(公告)日:2021-12-30
申请号:US17473679
申请日:2021-09-13
Applicant: Micron Technology, Inc.
Inventor: Matthew J. King , Anilkumar Chandolu , Indra V. Chary , Darwin A. Clampitt , Gordon Haller , Thomas George , Brett D. Lowe , David A. Daycock
IPC: H01L27/11573 , H01L21/762 , H01L27/11578 , H01L27/1157 , H01L21/768 , H01L27/11575
Abstract: A termination opening can be formed through the stack alternating dielectrics concurrently with forming contact openings through the stack. A termination structure can be formed in the termination opening. An additional opening can be formed through the termination structure and through the stack between groups of semiconductor structures that pass through the stack. In another example, an opening can be formed through the stack so that a first segment of the opening is between groups of semiconductor structures in a first region of the stack and a second segment of the opening is in a second region of the stack that does not include the groups of semiconductor structures. A material can be formed in the second segment so that the first segment terminates at the material. In some instances, the material can be implanted in the dielectrics in the second region through the second segment.
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公开(公告)号:US11121146B2
公开(公告)日:2021-09-14
申请号:US16159955
申请日:2018-10-15
Applicant: Micron Technology, Inc.
Inventor: Matthew J. King , Anilkumar Chandolu , Indra V. Chary , Darwin A. Clampitt , Gordon Haller , Thomas George , Brett D. Lowe , David A. Daycock
IPC: H01L27/11573 , H01L27/11578 , H01L21/768 , H01L21/762 , H01L27/1157 , H01L27/11575
Abstract: A termination opening can be formed through the stack alternating dielectrics concurrently with forming contact openings through the stack. A termination structure can be formed in the termination opening. An additional opening can be formed through the termination structure and through the stack between groups of semiconductor structures that pass through the stack. In another example, an opening can be formed through the stack so that a first segment of the opening is between groups of semiconductor structures in a first region of the stack and a second segment of the opening is in a second region of the stack that does not include the groups of semiconductor structures. A material can be formed in the second segment so that the first segment terminates at the material. In some instances, the material can be implanted in the dielectrics in the second region through the second segment.
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