公开(公告)号：US20240186234A1

公开(公告)日：2024-06-06

申请号：US18441767

申请日：2024-02-14

申请人： Micron Technology, Inc.

发明人： Sanh D. Tang ,  Roger W. Lindsay ,  Krishna K. Parat

IPC分类号： H01L23/52 ,  G11C13/00 ,  H01L23/528 ,  H01L27/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/27 ,  H10B43/35 ,  H10B63/00 ,  H10N70/00

CPC分类号： H01L23/52 ,  G11C13/0007 ,  H01L23/528 ,  H01L27/10 ,  H01L27/101 ,  H10B41/27 ,  H10B43/27 ,  H10B43/35 ,  H10B63/845 ,  H10N70/8822 ,  H10N70/8825 ,  H10N70/8828 ,  H10N70/8833 ,  H10N70/8836 ,  G11C2213/11 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/71 ,  G11C2213/75 ,  H01L2924/0002 ,  H10B41/35 ,  H10N70/882 ,  H10N70/883

摘要： A method of forming circuitry components includes forming a stack of horizontally extending and vertically overlapping features. The features extend horizontally though a primary portion of the stack with at least some of the features extending farther in the horizontal direction in an end portion. Operative structures are formed vertically through the features in the primary portion and dummy structures are formed vertically through the features in the end portion. Openings are formed through the features to form horizontally elongated and vertically overlapping lines from material of the features. The lines individually extend laterally about sides of vertically extending portions of both the operative structures and the dummy structures. Sacrificial material that is elevationally between the lines is at least partially removed in the primary and end portions laterally between the openings. Other aspects and implementations are disclosed.

公开(公告)号：US11910601B2

公开(公告)日：2024-02-20

申请号：US17141968

申请日：2021-01-05

申请人： Micron Technology, Inc.

发明人： Darwin A. Clampitt ,  John D. Hopkins ,  Matthew J. King ,  Roger W. Lindsay ,  Kevin Y. Titus

IPC分类号： H10B43/27 ,  H01L23/522 ,  H10B41/27

CPC分类号： H10B43/27 ,  H01L23/5226 ,  H10B41/27

摘要： A microelectronic device includes a pair of stack structures. The pair comprises a lower stack structure and an upper stack structure overlying the lower stack structure. The lower stack structure and the upper stack structure each comprise a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A source region is vertically interposed between the lower stack structure and the upper stack structure. A first array of pillars extends through the upper stack structure, from proximate the source region toward a first drain region above the upper stack structure. A second array of pillars extend through the lower stack structure, from proximate the source region toward a second drain region below the lower stack structure. Additional microelectronic devices are also disclosed, as are related methods and electronic systems.

公开(公告)号：US20230043786A1

公开(公告)日：2023-02-09

申请号：US17966594

申请日：2022-10-14

申请人： Micron Technology, Inc.

发明人： Darwin A. Clampitt ,  Roger W. Lindsay ,  Christopher R. Ritchie ,  Shawn D. Lyonsmith ,  Matthew J. King ,  Lisa M. Clampitt

IPC分类号： H01L27/11582 ,  H01L23/528 ,  H01L23/522 ,  H01L27/11556 ,  H01L21/768 ,  H01L27/11565 ,  H01L21/311 ,  H01L21/02 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11548 ,  G11C7/18

摘要： Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatus includes a first conductive contact; a second conductive contact; levels of conductive materials stacked over one another and located over the first and second conductive contacts; levels of dielectric materials interleaved with the levels of the conductive materials, the levels of conductive materials and the levels of dielectric materials formed a stack of materials; a first conductive structure located on a first side of the stack of materials and contacting the first conductive contact and a first level of conductive material of the levels of conductive materials; and a second conductive structure located on a second side of the stack of materials and contacting the second conductive contact and a second level of conductive material of the levels of conductive materials.

公开(公告)号：US20200243677A1

公开(公告)日：2020-07-30

申请号：US16845793

申请日：2020-04-10

申请人： Micron Technology, Inc.

发明人： Zhenyu Lu ,  Hongbin Zhu ,  Gordon A. Haller ,  Roger W. Lindsay ,  Andrew Bicksler ,  Brian J. Cleereman ,  Minsoo Lee

IPC分类号： H01L29/788 ,  H01L23/535 ,  H01L21/285 ,  H01L29/792 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11556 ,  H01L27/11524 ,  H01L29/66

摘要： A method to fabricate a three dimensional memory structure may include creating a stack of layers including a conductive source layer, a first insulating layer, a select gate source layer, and a second insulating layer, and an array stack. A hole through the stack of layers may then be created using the conductive source layer as a stop-etch layer. The source material may have an etch rate no faster than 33% as fast as an etch rate of the insulating material for the etch process used to create the hole. A pillar of semiconductor material may then fill the hole, so that the pillar of semiconductor material is in electrical contact with the conductive source layer.

公开(公告)号：US20190386021A1

公开(公告)日：2019-12-19

申请号：US16553587

申请日：2019-08-28

申请人： Micron Technology, Inc.

发明人： Roger W. Lindsay ,  Michael A. Smith ,  Brett D. Lowe

IPC分类号： H01L27/11582 ,  H01L27/11524 ,  H01L27/11575 ,  H01L27/11556 ,  H01L23/522 ,  H01L23/528 ,  H01L21/311 ,  H01L21/768 ,  H01L21/027 ,  H01L21/033

摘要： A method of forming a semiconductor device structure comprises forming a stack structure comprising stacked tiers. Each of the stacked tiers comprises a first structure comprising a first material and a second structure comprising a second, different material longitudinally adjacent the first structure. A patterned hard mask structure is formed over the stack structure. Dielectric structures are formed within openings in the patterned hard mask structure. A photoresist structure is formed over the dielectric structures and the patterned hard mask structure. The photoresist structure, the dielectric structures, and the stack structure are subjected to a series of material removal processes to form apertures extending to different depths within the stack structure. Dielectric structures are formed over side surfaces of the stack structure within the apertures. Conductive contact structures are formed to longitudinally extend to bottoms of the apertures. Semiconductor device structures, semiconductor devices, and electronic systems are also described.

公开(公告)号：US10446579B2

公开(公告)日：2019-10-15

申请号：US16183392

申请日：2018-11-07

申请人： Micron Technology, Inc.

发明人： Roger W. Lindsay ,  Michael A. Smith ,  Brett D. Lowe

IPC分类号： H01L27/11582 ,  H01L21/768 ,  H01L21/033 ,  H01L21/027 ,  H01L21/311 ,  H01L23/528 ,  H01L23/522 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573

摘要： A method of forming a semiconductor device structure comprises forming a stack structure comprising stacked tiers. Each of the stacked tiers comprises a first structure comprising a first material and a second structure comprising a second, different material longitudinally adjacent the first structure. A patterned hard mask structure is formed over the stack structure. Dielectric structures are formed within openings in the patterned hard mask structure. A photoresist structure is formed over the dielectric structures and the patterned hard mask structure. The photoresist structure, the dielectric structures, and the stack structure are subjected to a series of material removal processes to form apertures extending to different depths within the stack structure. Dielectric structures are formed over side surfaces of the stack structure within the apertures. Conductive contact structures are formed to longitudinally extend to bottoms of the apertures. Semiconductor device structures, semiconductor devices, and electronic systems are also described.

公开(公告)号：US20190288002A1

公开(公告)日：2019-09-19

申请号：US16419736

申请日：2019-05-22

申请人： Micron Technology, Inc.

发明人： Zhenyu Lu ,  Roger W. Lindsay ,  Akira Goda ,  John Hopkins

IPC分类号： H01L27/11582 ,  H01L27/11573 ,  G11C16/04 ,  H01L27/11529 ,  G11C16/26 ,  H01L27/11556 ,  H01L27/11524 ,  G11C16/34 ,  G11C16/14 ,  H01L21/02 ,  H01L27/1157

摘要： Some embodiments include apparatuses and methods having multiple decks of memory cells and associated control gates. A method includes forming a first deck having alternating conductor materials and dielectric materials and a hole containing materials extending through the conductor materials and the dielectric materials. The methods can also include forming a sacrificial material in an enlarged portion of the hole and forming a second deck of memory cells over the first deck. Additional apparatuses and methods are described.

公开(公告)号：US20180175059A1

公开(公告)日：2018-06-21

申请号：US15900188

申请日：2018-02-20

申请人： Micron Technology, Inc.

发明人： Sanh D. Tang ,  Roger W. Lindsay ,  Krishna K. Parat

IPC分类号： H01L27/11582 ,  H01L27/1157 ,  H01L27/11524 ,  H01L45/00

CPC分类号： H01L23/52 ,  G11C13/0007 ,  G11C2213/11 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/71 ,  G11C2213/75 ,  H01L23/528 ,  H01L27/10 ,  H01L27/101 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L27/249 ,  H01L45/141 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming circuitry components includes forming a stack of horizontally extending and vertically overlapping features. The stack has a primary portion and an end portion. At least some of the features extend farther in the horizontal direction in the end portion moving deeper into the stack in the end portion. Operative structures are formed vertically through the features in the primary portion and dummy structures are formed vertically through the features in the end portion. Horizontally elongated openings are formed through the features to form horizontally elongated and vertically overlapping lines from material of the features. The lines individually extend from the primary portion into the end portion, and individually laterally about sides of vertically extending portions of both the operative structures and the dummy structures. Sacrificial material that is elevationally between the lines is at least partially removed in the primary and end portions laterally between the horizontally elongated openings. Other aspects and implementations are disclosed.

公开(公告)号：US20160372479A1

公开(公告)日：2016-12-22

申请号：US15255967

申请日：2016-09-02

申请人： Micron Technology, Inc.

发明人： Zhenyu Lu ,  Roger W. Lindsay ,  Andrew Bicksler ,  Yongjun Jeff Hu ,  Haitao Liu

IPC分类号： H01L27/115 ,  H01L23/528 ,  H01L29/45

CPC分类号： H01L27/11556 ,  H01L23/5283 ,  H01L27/11524 ,  H01L29/456 ,  H01L29/66825 ,  H01L29/7926

摘要： Methods for forming a string of memory cells, an apparatus having a string of memory cells, and a system are disclosed. A method for forming the string of memory cells comprises forming a metal silicide source material over a substrate. The metal silicide source material is doped. A vertical string of memory cells is formed over the metal silicide source material. A semiconductor material is formed vertically and adjacent to the vertical string of memory cells and coupled to the metal silicide source material.

公开(公告)号：US20160225822A1

公开(公告)日：2016-08-04

申请号：US15095208

申请日：2016-04-11

申请人： Micron Technology, Inc.

发明人： Sanh D. Tang ,  Roger W. Lindsay ,  Krishna K. Parat

IPC分类号： H01L27/24 ,  G11C13/00 ,  H01L45/00 ,  H01L27/115 ,  H01L23/528

CPC分类号： H01L27/11582 ,  G11C13/0007 ,  G11C2213/11 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/71 ,  G11C2213/75 ,  H01L23/52 ,  H01L23/528 ,  H01L27/10 ,  H01L27/101 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/249 ,  H01L45/141 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming circuitry components includes forming a stack of horizontally extending and vertically overlapping features. The stack has a primary portion and an end portion. At least some of the features extend farther in the horizontal direction in the end portion moving deeper into the stack in the end portion. Operative structures are formed vertically through the features in the primary portion and dummy structures are formed vertically through the features in the end portion. Horizontally elongated openings are formed through the features to form horizontally elongated and vertically overlapping lines from material of the features. The lines individually extend from the primary portion into the end portion, and individually laterally about sides of vertically extending portions of both the operative structures and the dummy structures. Sacrificial material that is elevationally between the lines is at least partially removed in the primary and end portions laterally between the horizontally elongated openings. Other aspects and implementations are disclosed.