OPTIMIZED PROGRAMMING WITH A SINGLE BIT PER MEMORY CELL AND MULTIPLE BITS PER MEMORY CELL
Abstract:
Apparatuses and techniques are described for optimizing programming in a memory device in which memory cells can be programmed using single bit per cell programming and multiple bits per cell programming. In one aspect, a single bit per cell program operation is performed which reduces damage to the memory cells as well as reducing program time. The program operation can omit a pre-charge phase and a verify phase of an initial program loop of a program operation. Instead, a program phase is performed followed by a recovery phase. In one or more subsequent program loops of the single bit per cell program operation, as well as in each program loop of a multiple bit per cell program operation, the program loop includes a pre-charge phase, a program phase, a recovery phase and a verify phase.
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