Invention Application
- Patent Title: STRIPPED REDISTRUBUTION-LAYER FABRICATION FOR PACKAGE-TOP EMBEDDED MULTI-DIE INTERCONNECT BRIDGE
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Application No.: US17716937Application Date: 2022-04-08
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Publication No.: US20220230958A1Publication Date: 2022-07-21
- Inventor: Jiun Hann SIR , Poh Boon KHOO , Eng Huat GOH , Amruthavalli Pallavi ALUR , Debendra MALLIK
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/00

Abstract:
An embedded multi-die interconnect bridge (EMIB) is fabricated on a substrate using photolithographic techniques, and the EMIB is separated from the substrate and placed on the penultimate layer of an integrated-circuit package substrate, below the top solder-resist layer. A low Z-height of the EMIB, allows for useful trace and via real estate below the EMIB, to be employed in the package substrate.
Public/Granted literature
- US11908793B2 Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridge Public/Granted day:2024-02-20
Information query
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