Invention Application
- Patent Title: STACKED PROGRAMMABLE INTEGRATED CIRCUITRY WITH SMART MEMORY
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Application No.: US17713030Application Date: 2022-04-04
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Publication No.: US20220231689A1Publication Date: 2022-07-21
- Inventor: Sean Atsatt
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H03K19/17736
- IPC: H03K19/17736 ; H01L25/18 ; H03K19/1776 ; H03K19/173 ; H03K19/17756 ; G11C15/00 ; H03K19/17728

Abstract:
Circuitry is provided that includes programmable fabric with fine-grain routing wires and a separate programmable coarse-grain routing network that provides enhanced bandwidth, low latency, and deterministic routing behavior. The programmable fabric may be implemented on a top die that is stacked on the active interposer die. The programmable coarse-grain routing network and smart memory circuitry may be implemented on an active interposer die. the smart memory circuitry may be configured to perform higher level functions than simple read and write operations. The smart memory circuitry may carry out command based low cycle count operations using a state machine without requiring execution of a program code, complex microcontroller based multicycle operations, and other non-generic microcontroller based smart RAM functions.
Public/Granted literature
- US12132482B2 Stacked programmable integrated circuitry with smart memory Public/Granted day:2024-10-29
Information query
IPC分类: