Invention Application
- Patent Title: Self-Aligned Spacers For Multi-Gate Devices And Method Of Fabrication Thereof
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Application No.: US17717477Application Date: 2022-04-11
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Publication No.: US20220238725A1Publication Date: 2022-07-28
- Inventor: Kuo-Cheng Chiang , Shi Ning Ju , Guan-Lin Chen , Kuan-Lun Cheng , Chih-Hao Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/66 ; H01L29/423 ; H01L29/40 ; H01L21/02
Abstract:
A semiconductor device includes a substrate, a channel member above the substrate, a gate structure engaging the channel member, an epitaxial feature in physical contact with the channel member, and a dielectric layer interposing the gate structure and the epitaxial feature. A sidewall surface of the dielectric layer facing the gate structure has a convex shape in a top view, and the convex shape has a center portion extending towards the gate structure.
Public/Granted literature
- US11862734B2 Self-aligned spacers for multi-gate devices and method of fabrication thereof Public/Granted day:2024-01-02
Information query
IPC分类:
