Invention Application
- Patent Title: CAVITY SPACER FOR NANOWIRE TRANSISTORS
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Application No.: US17725471Application Date: 2022-04-20
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Publication No.: US20220246721A1Publication Date: 2022-08-04
- Inventor: William HSU , Biswajeet GUHA , Leonard GULER , Souvik CHAKRABARTY , Jun Sung KANG , Bruce BEATTIE , Tahir GHANI
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/8238 ; H01L29/423 ; H01L29/66 ; H01L29/78

Abstract:
A transistor structure includes a base and a body over the base. The body comprises a semiconductor material and has a first end portion and a second end portion. A gate structure is wrapped around the body between the first end portion and the second end portion, where the gate structure includes a gate electrode and a dielectric between the gate electrode and the body. A source is in contact with the first end portion and a drain is in contact with the second end portion. A first spacer material is on opposite sides of the gate electrode and above the first end portion. A second spacer material is adjacent the gate structure and under the first end portion of the nanowire body. The second spacer material is below and in contact with a bottom surface of the source and the drain.
Public/Granted literature
- US11929396B2 Cavity spacer for nanowire transistors Public/Granted day:2024-03-12
Information query
IPC分类: