公开(公告)号：US20220246721A1

公开(公告)日：2022-08-04

申请号：US17725471

申请日：2022-04-20

Applicant: INTEL CORPORATION

Inventor： William HSU ,  Biswajeet GUHA ,  Leonard GULER ,  Souvik CHAKRABARTY ,  Jun Sung KANG ,  Bruce BEATTIE ,  Tahir GHANI

IPC: H01L29/06 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

Abstract: A transistor structure includes a base and a body over the base. The body comprises a semiconductor material and has a first end portion and a second end portion. A gate structure is wrapped around the body between the first end portion and the second end portion, where the gate structure includes a gate electrode and a dielectric between the gate electrode and the body. A source is in contact with the first end portion and a drain is in contact with the second end portion. A first spacer material is on opposite sides of the gate electrode and above the first end portion. A second spacer material is adjacent the gate structure and under the first end portion of the nanowire body. The second spacer material is below and in contact with a bottom surface of the source and the drain.

公开(公告)号：US20150234272A1

公开(公告)日：2015-08-20

申请号：US14181131

申请日：2014-02-14

Applicant: Intel Corporation ,  Cornell University

Inventor： Chandrasekhar SARMA ,  Christopher K. OBER ,  Emmanuel P. GIANNELIS ,  Souvik CHAKRABARTY

IPC: G03F7/004

CPC classification number: G03F7/0045 ,  G03F7/0047 ,  G03F7/0392

Abstract: The invention provides new nanoparticles that include a Group 4 metal oxide core and a coating surrounding the core, where the coating contains a ligand according to Formula (I), or a carboxylate thereof. The invention also provides new photoresist compositions that include a photoacid generator and a ligand acid or carboxylate thereof, where pKaPAG is lower than pKaLA. Methods for patterning a substrate using the inventive photoresist composition are also provided.

Abstract translation: 本发明提供了新的纳米颗粒，其包括第4族金属氧化物核心和包围核心的涂层，其中涂层含有根据式（I）的配体或其羧酸盐。 本发明还提供了新的光致抗蚀剂组合物，其包括光酸产生剂及其配体酸或羧酸盐，其中pKaPAG低于pKaLA。 还提供了使用本发明的光刻胶组合物图案化衬底的方法。

公开(公告)号：US20240347595A1

公开(公告)日：2024-10-17

申请号：US18410681

申请日：2024-01-11

Applicant: Intel Corporation

Inventor： William HSU ,  Biswajeet GUHA ,  Leonard GULER ,  Souvik CHAKRABARTY ,  Jun Sung KANG ,  Bruce BEATTIE ,  Tahir GHANI

IPC: H01L29/06 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  B82Y10/00

CPC classification number: H01L29/0673 ,  H01L21/823821 ,  H01L29/0653 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/785 ,  B82Y10/00

Abstract: A transistor structure includes a base and a body over the base. The body comprises a semiconductor material and has a first end portion and a second end portion. A gate structure is wrapped around the body between the first end portion and the second end portion, where the gate structure includes a gate electrode and a dielectric between the gate electrode and the body. A source is in contact with the first end portion and a drain is in contact with the second end portion. A first spacer material is on opposite sides of the gate electrode and above the first end portion. A second spacer material is adjacent the gate structure and under the first end portion of the nanowire body. The second spacer material is below and in contact with a bottom surface of the source and the drain.