A fault isolation analysis method includes: providing a package structure in which there is an electrical fault; detecting whether the electrical fault is in interconnecting wires, and if the electrical fault is in the interconnecting wires, determining that the electrical fault is caused by the interconnecting wire; and if the electrical fault is not in the interconnecting wires, breaking the interconnecting wires to electrically isolate the chip structure from the substrate, then detecting whether the electrical fault is in the structure, and if the electrical fault is able to be detected, determining that the electrical fault is caused by the substrate, or if the electrical fault is not able to be detected, determining that the electrical fault is caused by the chip structure.