Invention Application
- Patent Title: SEMICONDUCTOR DEVICE, LAYOUT DESIGN METHOD FOR THE SAME AND METHOD FOR FABRICATING THE SAME
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Application No.: US17740829Application Date: 2022-05-10
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Publication No.: US20220271133A1Publication Date: 2022-08-25
- Inventor: Ji Su YU , Hyeon Gyu YOU , Seung Man LIM
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Priority: KR10-2019-0124324 20191008
- Main IPC: H01L29/417
- IPC: H01L29/417 ; H01L27/088 ; H01L29/40 ; H01L29/78 ; H01L23/522 ; G06F30/392 ; G06F30/3953 ; H01L29/423 ; H01L29/66 ; H01L23/528

Abstract:
A semiconductor device includes a first and second active pattern extending in a first direction on a substrate, a first and second gate electrode extending in a second direction to intersect the first and second active pattern, a first source/drain contact extending in the second direction and connected to a first and source/drain region of the first and second active patterns, respectively, a first source/drain via connected to the first source/drain contact, a first cell separation film extending in the second direction and crosses the first active pattern and the second active pattern, between the first source/drain contact and the second gate electrode, a first gate via connected to the second gate electrode and arranged with the first source/drain via along the first direction, and a first connection wiring which extending in the first direction and connects the first source/drain via and the first gate via.
Public/Granted literature
- US11916120B2 Semiconductor device, layout design method for the same and method for fabricating the same Public/Granted day:2024-02-27
Information query
IPC分类: