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1.
公开(公告)号:US20220271133A1
公开(公告)日:2022-08-25
申请号:US17740829
申请日:2022-05-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ji Su YU , Hyeon Gyu YOU , Seung Man LIM
IPC: H01L29/417 , H01L27/088 , H01L29/40 , H01L29/78 , H01L23/522 , G06F30/392 , G06F30/3953 , H01L29/423 , H01L29/66 , H01L23/528
Abstract: A semiconductor device includes a first and second active pattern extending in a first direction on a substrate, a first and second gate electrode extending in a second direction to intersect the first and second active pattern, a first source/drain contact extending in the second direction and connected to a first and source/drain region of the first and second active patterns, respectively, a first source/drain via connected to the first source/drain contact, a first cell separation film extending in the second direction and crosses the first active pattern and the second active pattern, between the first source/drain contact and the second gate electrode, a first gate via connected to the second gate electrode and arranged with the first source/drain via along the first direction, and a first connection wiring which extending in the first direction and connects the first source/drain via and the first gate via.
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公开(公告)号:US20230083727A1
公开(公告)日:2023-03-16
申请号:US17841747
申请日:2022-06-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jong Woo KIM , Seung Man LIM , Eun-Hee CHOI , Min su KIM , Sang Jin CHEONG
IPC: G06F30/3953 , G06F30/392
Abstract: An integrated circuit including: a first cell including first-a and second-a output pins, a first routing wire connecting the first-a output pin to the second-a output pin, a first-a via connecting the first-a output pin to the first routing wire, and a second-a via connecting the second-a output pin to the first routing wire; and a second cell including first-b and second-b output pins, a second routing wire connecting the first-b output pin to the second-b output pin, a first-b via connecting the first-b output pin to the second routing wire, and a second-b via connecting the second-b output pin to the second routing wire, wherein the first-a via is at a first-a position, the second-a via is at a second-a position, the first-b via is at a first-b position, the second-b via is at a second-b position different from each other.
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公开(公告)号:US20210167090A1
公开(公告)日:2021-06-03
申请号:US17027211
申请日:2020-09-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ji Su YU , Jae-Ho PARK , Sanghoon BAEK , Hyeon Gyu YOU , Seung Young LEE , Seung Man LIM
IPC: H01L27/118 , H01L27/02
Abstract: An integrated circuit includes a first standard cell including a first p-type transistor, a first n-type transistor, a first gate stack intersecting first and second active regions, first extended source/drain contacts on a first side of the first gate stack, a first normal source/drain contact on a second side of the first gate stack, a first gate via connected to the first gate stack, and a first source/drain via connected to the first normal source/drain contact, a second standard cell adjacent the first standard cell and including a second p-type transistor, a second n-type transistor, a second gate stack intersecting the first and second active regions, and a second gate via connected to the second gate stack, an input wiring connected to the first gate via, and an output wiring at a same level as the input wiring to connect the first source/drain via and the second gate via.
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4.
公开(公告)号:US20210104611A1
公开(公告)日:2021-04-08
申请号:US16857288
申请日:2020-04-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ji Su YU , Hyeon Gyu YOU , Seung Man LIM
IPC: H01L29/417 , H01L27/088 , H01L29/40 , H01L29/78 , H01L29/66 , H01L23/522 , G06F30/392 , G06F30/3953 , H01L29/423
Abstract: A semiconductor device includes a first and second active pattern extending in a first direction on a substrate, a first and second gate electrode extending in a second direction to intersect the first and second active pattern, a first source/drain contact extending in the second direction and connected to a first and source/drain region of the first and second active patterns, respectively, a first source/drain via connected to the first source/drain contact, a first cell separation film extending in the second direction and crosses the first active pattern and the second active pattern, between the first source/drain contact and the second gate electrode, a first gate via connected to the second gate electrode and arranged with the first source/drain via along the first direction, and a first connection wiring which extending in the first direction and connects the first source/drain via and the first gate via.
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